Glossary

Asset. Data written to flash by the bootloader that the board must retain across power cycles: a calibration, a lookup table, a frozen threshold. Contrast with parameter.

AXISRAM. The region of the STM32N657's 4.2 MB on-chip SRAM from which the application executes. The core's linker script uses 2 MB of it.

Camera-normalised. A coordinate from 0 to 1 across the full camera frame. The space used by the host and by regions passed to runRoi().

Carrier. A board that mounts the camera module and connects it to the Neuro N6. The standard Neuro Vision carrier and the TFT carrier wire the CSI lanes differently.

Cascade. A two-stage inference in which a detector finds a subject and a second model runs on a crop of it.

CCI. Command and Control Interface, the FLIR Lepton's I2C control channel.

CDC. USB Communications Device Class. The serial port presented by the board.

CSI-2. MIPI Camera Serial Interface, the two-lane link from the camera to the STM32N6.

DCMIPP. Digital Camera Module Interface Pixel Pipeline, the STM32N6 peripheral that receives camera data and provides three pipes for the display, the JPEG encoder and the neural network input.

DFU. Device Firmware Upgrade. The USB mode the bootloader presents for uploads.

Epoch. A segment of a compiled neural network that executes as a unit on the NPU (HW), on the CPU (SW) or with both (Hybrid).

Evidence. Host-bound data that exists only for a human to look at: thumbnails, histograms, masks. Produced only when a host has subscribed.

FSBL. First Stage Boot Loader. The bootloader in external flash that copies the application into RAM and provides the DFU mode.

Global shutter. A sensor that exposes every pixel simultaneously. The VD66GY. Contrast with rolling shutter.

IoU. Intersection over union. The overlap ratio at which two detection boxes are merged.

ISP. Image signal processor. The part of the DCMIPP that demosaics raw Bayer data and applies white balance, gamma and colour correction.

LTDC. LCD-TFT Display Controller, the STM32N6 peripheral that drives the panel.

MDF. Multi-function Digital Filter, the STM32N6 peripheral that decodes the PDM microphone.

Metadata slot. One of a fixed set of buffers into which post-processors and sensor libraries publish results. The capture task composes all slots into each frame sent to the host.

Neuro Studio. Ohm Lab's desktop application that receives video, overlays, sensor data and the serial console from the board.

NN-normalised. A coordinate from 0 to 1 across the input fed to a model, which under a crop is part of the frame.

NPU. Neural processing unit. The STM32N657's Neural-ART accelerator, up to 1 GHz, 600 GOPS, 288 MAC per cycle.

Overlay. The ARGB4444 hardware layer above the camera image on the panel, on which post-processors and sketches draw.

Parameter. A live value set from the host, applied immediately and not persisted. Contrast with asset.

Post-processor. Code that converts a model's output tensors into results and publishes them. An instance of IPostProcessor.

Pragma. The #pragma neuron6 model="..." directive that compiles a model into a sketch.

PSRAM. Pseudo-static RAM. The 64 MB external memory over OctoSPI, of which the core maps about 30 MB.

Region. An n6_roi_t: a centre, size and angle in camera-normalised coordinates, used by runRoi() and the tracker.

SAI. Serial Audio Interface, the STM32N6 peripheral that feeds the speaker amplifier.

Slot. See metadata slot.

Stop mode. A low power state in which SRAM and registers are retained and the RTC can wake the core.

TLV. Tag, length, value. The record format of metadata sent to the host.

Transport. The destination of the video: USB, WiFi access point, WiFi station or the panel.

VENC. The STM32N6 hardware video encoder: H.264 to 1080p at 15 fps and JPEG to 300 Mpixel/s, with 128 KB of working RAM. The core uses it for JPEG.

VoSPI. Video over SPI, the FLIR Lepton's frame output protocol.

Weights pool. The 26.5 MB region of external flash holding model weights.

XSPI. The STM32N6 extended serial interface to the external flash and PSRAM, memory mapped, in 8-bit OctoSPI mode at up to 200 MHz on this board.